Modern system-on-chip (SoC) designs benefit from the integration of design IP as a method of modularizing design workflows, leveraging re-usability of components, and improving design quality as well as time-to-market. IP production teams provide standard cells, I/Os, and many other types of digital and analog IP, including interface blocks, power management units, data conversion IP, etc., to be integrated at the chip-level or higher block levels.
For all of these IP types, effective validation that anticipates SoC integration challenges is important to ensure the final design meets power, performance and area metrics while staying within production schedules and budgets. A strong IP QA methodology achieves this by detecting issues early and improving the quality of the IP used.
This white paper describes how STMicroelectronics utilizes Solido™ tools to deliver a comprehensive solution for IP QA and .lib validation.