Questa automates verification and debug of complex SoCs and FPGAs, dramatically increasing productivity and helping companies manage resources more efficiently.
Best-in-class technologies maximise the effectiveness of verification at the block, subsystem and system levels.
Questa Advanced Simulator
Industry-leading performance and capacity for digital RTL and gate blocks and SoCs from System Verilog & VHDL.
Questa Power-Aware Simulator
The Questa Power-Aware Simulator enables design teams to verify the active power management planned for implementation, but starting much earlier in the design process. Static checks during UPF compilation locate architectural issues, while dynamic checks during simulation find behavioral issues.