Inherited connections in S-Edit
Inherited connections allow power routing to propagate from top to lower levels in the design hierarchy, allowed for easy power management. This tech note shows how to use them.
Custom IC Design Solution
Boolean operations in L-Edit (Using GUI & UPI)
This note will explain how to use Boolean operations in L-Edit. This is beneficial when changing the size of an object or making an object that is the product of Boolean relationship between objects on different layers.
Find schematic parameters in S-Edit (Video)
This video shows how to automatically search for parameters in your schematic and load them into the simulation setup, which is a new feature in v2021.2 of S-Edit.
Setting up complex rules with Standard DRC
Standard DRC is the native tool in L-Edit for checking a layout cell for possible issues. With the help of derived layers, a user can configure Standard DRC to define complex rules. This tech note shows how to realise complex rules in Standard DRC using an example.
Cross-vendor schematic OA compatibility considerations
This article aims to provide some notes to improve cross compatibility when handling Open Access (OA) databases from other venders and tanner.
Using Calibre RealTime in L-Edit (Video tutorial)
Calibre RealTime is a new feature in L-Edit to detect and fix DRC errors on the go using Calibre's powerful physical verification engine. This video shows how to use this new feature and how to set it up with keyboard shortcuts.
Execute L-Edit macros in command line mode (No GUI interaction)
L-Edit can be launched from the command line, and various arguments can be used to launch a macro. This comes in handy when a user wants to open a design and run a macro automatically without performing GUI operations. This tech note will guide you through the steps necessary to use this feature.
MOS device abutment (advanced nodes)
The abutment feature in L-Edit allows users to take MOS devices that may have bracketing dummy poly devices and perform drain/source sharing at a press of a button. This tech note concerns 22nm processes.
Using Wafer tools in L-Edit
In this video tutorial, learn how to use the wafer tools in L-Edit. These tools will help you visualise die distribution and labeling on a wafer.
Match pin order of PEX netlist to schematic or other sources
The default setting in Calibre PEX is to use the layout pin order. If this causes a mismatch in your flow, you can make Calibre PEX use the schematic’s pin order instead, or other sources.