Siemens EDA

Performing XOR using Calibre One

Calibre provides XOR through the DRC verification option to compare two layout cells in Tanner tools. There are two layout comparison flows through the Calibre DRC integration, FastXOR and XOR. This technote will go over the Layout vs Layout techniques when running not using FASTXOR.

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Creating multiple simultaneous cell windows

When working with multiple windows, a user may want to stack or create dockable views of cells to manage screen space efficiently and simultaneously access multiple views. This feature is available in S-Edit and L-Edit through the same methods.

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Netlisting in S-Edit via Tcl Procedures

S-Edit allows running netlisting procedures in Tcl that would enable greater control over how your device or subcircuit can be netlisted. This guide will explain how to create a Tcl netlister for your devices, supported by examples.

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Compound Waveforms in EZ-Wave

EZ-Wave Waveform Calculator can be used to complete many calculations and extract waveforms. This guide explains how to take an existing compound wave and split it into separate waveforms, as well as combine separate waveforms to create a compound waveform.

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Read T-SPICE results in EZWave

Simulations can be run in Tanner T-Spice and saved in Nutmeg format so that the results can be displayed in other applications such as EZ-Wave. This allows for simulations to be generated using a T-Spice license, and calculations and viewing can occur on an AMSV license.

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Control Parsing of SPICE, Verilog and VHDL Views in S-Edit

In certain cases, not parsing the netlist view can prevent S-Edit from netlisting the subcircuits that make up the netlist, for example in case of a digital block in CDL format, S-Edit may not netlist the subcircuits (standard cells) which might cause issues downstream in LVS.

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