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Further product details

L-Edit IC

L-Edit is a complete hierarchical physical layout tool with cross-probe to schematic, layout and LVS & full integration with Calibre.

S-Edit

Increases productivity for complex IC design, links to analog mixed simulation and schematic driven layout .

Tanner Calibre® One DRC/LVS/xRC

The Tanner-Calibre One IC verification suite is an integral part of the Tanner analog/mixed-signal (AMS) physical design environment, creating an easy path to the proven capabilities of Calibre verification tools.

Tanner Designer

Tanner Designer helps teams easily track analog verification throughout the entire design cycle.

Tanner Digital Implementer

Integrated, flexible digital synthesis and place & route tool that speeds development of analog/mixed-signal designs

Analog FastSPICE

Industry standard SPICE simulation for nm analog, RF, mixed-signal, and custom digital

EZwave

The EZwave Joint Waveform DataBase (JWDB) is a high-performance waveform database for manipulating huge waveform databases from leading simulators, loading gigabytes of data in seconds. EZwave provides native support for Eldo® Classic, Eldo RF, Eldo Premier, ADiT™, Questa® ADMS, Questa, and HyperLynx tools. It also supports other simulation data formats…

Solido Characterization Suite

Comprehensive suite of fast, accurate library characterization tools powered by machine learning. Significantly reduces standard cell, custom cell and memory characterization time and resources, while delivering production-accurate Liberty models and statistical data.

Solido Design Environment

A comprehensive AI-powered design environment for all SPICE-level design and verification, and is a single unified solution for nominal and variation analysis. Used by thousands of designers to produce the most competitive products in hp computing, AI, IoT, automotive and mobile applications.

Solido IP Validation Suite

The industry’s first end-to-end silicon IP quality assurance for IC design. Solido IP Validation suite offers the fastest, most comprehensive integrated IP validation solution, providing complete, seamless IP QA from design to tape-out, across all design views and IP revisions.

Solido Simulation Suite

An integrated suite of AI-accelerated SPICE, Fast SPICE and mixed-signal simulators designed to help customers dramatically accelerate critical design and verification tasks for their next-generation analog, mixed-signal and custom IC designs.