EDA Solutions and Sofics have joined forces to present an in-depth discussion on IC design, with a specific focus on I/O protection mechanisms and ensuring their reliability.

Sofics, renowned for their expertise in creating technically differentiated solutions for IC interfaces, PHYs, and I/Os, will share insights on designing Overvoltage Tolerant General Purpose Input/Output (OVT GPIO) circuits within advanced CMOS technology nodes, emphasizing finFET and Gate-All-Around (GAA) architectures.

The presentation will cover the primary overvoltage design challenges associated with these advanced nodes, outline the design approach for the GPIO circuit, and delve into layout considerations specific to FinFET nodes, highlighting four distinct layout styles.  Additionally, the verification process to ensure the design’s effectiveness and reliability will be discussed.

EDA Solutions will complement the Sofics presentation by exploring Siemens EDA’s Custom IC Design solution, explaining how each of the primary tools contributes to the design flow for both planar and FinFET IC design.  Emphasis will be given to simulation and analysis with Solido Design Environment and physical and reliability verification with Calibre PERC.

Who should attend?

• IC design engineer
• Chip architect
• Product line manager
• VP silicon / VP Engineering / Design Centre Manager